Cadence introduces Maestro, AI models for designing chips

On October 26, 2026, Cadence announced Maestro, a portfolio of artificial intelligence models specialized in chip and system design. The first models are expected to be offered in early access to select customers in the fourth quarter of 2026.

Cadence already offers design agents, including ChipStack. Maestro is intended to provide them with specialized models. Cadence describes a process in which agents break a goal down into tasks, orchestrate specialized or general-purpose models and use its design and verification software.

The company says tools and solvers evaluate the results against engineering constraints. These evaluations feed learning loops. They do not, on their own, validate a chip for manufacturing.

Cadence plans to offer the environment on its cloud, a public cloud or the customer’s infrastructure. The models can be adapted to the customer’s proprietary data and designs. In-house deployment can provide greater control over computing and designs, although where data flows are located depends on the configuration.

Cadence and Nvidia are also working to integrate the OpenShell Reference Architecture. Nvidia presents this reference architecture, based on OpenShell software, as a way to secure agents.

Gains compared with the original model

Cadence claims initial results of up to a 30% improvement in quality and up to five times greater token efficiency compared with a general-purpose foundation model. Tokens are units of text processed by models.

Tom’s Hardware specifies that the comparison is with the original open model, before its adaptation. Cadence specifies neither the quality metric nor the name of the model used for comparison.

Tom’s Hardware reports that Maestro is included in the Cadence agent subscription, with a usage quota followed by charges for additional consumption. Greater token efficiency does not guarantee an equivalent reduction in total cost, which also depends on computing, hardware and configuration.